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ATCA-3671 Quad Virtex-7 690T FPGA模块|NI (在产)

四个用户可编程的Virtex-7 690T FPGA

4个用于模拟和高速串行I/O的插槽

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Quad Virtex-7 690T FPGA模块(适用于ATCA产品)

ATCA-3671具有四个用户可编程的Virtex-7 690T FPGA,同时还提供了4个用于模拟和高速串行I/O的插槽。ATCA-3671适用于需要大量实时信号处理的应用,包括5G/无线算法研究、原型验证和现场试验。ATCA-3671可使用LabVIEW FPGA模块和BEEcube Platform Studio进行编程。

产品编号: 785138-01


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Conditions

Specifications are valid at 23 °C unless otherwise noted.

Reconfigurable FPGA

FPGA

4x Virtex-7 XC7VX690T

FPGA Resources

NoteThe following specifications apply to each FPGA.

LUTs

433,200

DSP48 slices (25 × 18 Multiplier)

3,600

Embedded block RAM

52,920 kb

Default timebase

100 MHz

Timebase reference sources

Onboard 100 MHz oscillator

Timebase accuracy

±100 ppm, 250 ps peak-to-peak jitter

Data transfers

DMA, interrupts, programmed I/O

Number of DMA channels

64

FPGA Digital Input/Output

NoteThe following specifications apply to each FPGA.
External GPIONumber of channels10Maximum I/O data rate100 Mb/sI/O compatibility3.3 V, single-endedESDIEC 61000-4-2 (ESD) ± 30 kV (contact)
Inter-FPGANumber of channels[1]27Maximum I/O data rate1 Gb/sI/O compatibility1.8 V, LVDS

Onboard DRAM

NoteThe following specifications apply to each FPGA.

Memory size

16 GB (two 8 GB DIMMs)

Theoretical maximum data rate

21 GB/s

Jitter Cleaning Dual Phase Locked Loop (PLL)

NoteThe following specifications apply to each FPGA.

Clock Jitter Cleaner

TI LMK04808B

VCXO frequency

122.88 MHz

Number of clock sources from FPGA

1

Number of MGT reference clock outputs

8

Number of SMA external clock outputs

1

Inter-FPGA High-Speed Serial Transceivers

Number of lanes to adjacent (ring) FPGAs

16

Number of lanes to diagonal FPGA

12

Maximum data rate

12.5 Gb/s

NoteEach FPGA has a serial connection to two adjacent (ring) FPGAs and one diagonal FPGA.

FPGA CLK/TRIG

Table 1. FPGA Clock/Trigger Input
NameInput LocationDestinationUse CasesInput P2P SkewMax CLK Rate
SYNC BACKPLANE A/BOn-board (backplane)Global (all FPGAs)Clocks/Trigger900 ps125 MHz
SYNC FRONT PANEL A/BSMAGlobal (all FPGAs)Clocks/Trigger100 ps312.5 MHz
GCLK0-3On-board (FPGA)Programmable (all FPGAs)Clocks/Trigger1,550 ps312.5 MHz
FPGA IN/OUT A-DSMASingle FPGAClocks/Trigger500 ps [2]312.5 MHz
MGT REFSMAGlobal (all FPGAs)Clocks200 ps312.5 MHz
FMC CLKSMAGlobal (all FMCs)Clocks100 ps—
Table 2. FPGA Clock/Trigger Output
NameOutput DriverDestinationUse CasesOutput P2P SkewMax CLK Rate
SYNC BACKPLANE A/BFPGABackplaneClocks/Trigger600 ps125 MHz
GCLK0-3FPGAProgrammable (all FPGAs)Clocks/Trigger1,550 ps312.5 MHz
FPGA IN/OUT A-DFPGASMAClocks/Trigger500 ps [2]312.5 MHz

Power

Maximum Power Requirements

NotePower requirements are dependent on the adapter modules installed and the contents of the FPGA application.

Power supply

-48 V

Current

9 A

Maximum Working Voltage

NoteMaximum working voltage refers to the signal voltage plus the common-mode voltage.

Channel-to-earth

0 V to 3.3 V, Measurement Category I

Channel-to-channel

0 V to 3.3 V, Measurement Category I

CautionDo not use this device for connecting to signals in Measurement Categories II, III, or IV.NoteMeasurement Categories CAT I and CAT O are equivalent. These test and measurement circuits are not intended for direct connection to the MAINS building installations of Measurement Categories CAT II, CAT III, or CAT IV.

Physical

Dimensions (not including connectors)

31.1 cm × 35.2 cm × 6.2 cm (12.3 in. × 13.9 in. × 2.5 in.)

Weight

4.5 kg (10.0 lbs)

NoticeClean the hardware with a soft, nonmetallic brush. Make sure that the hardware is completely dry and free from contaminants before returning it to service.

Environment

Ambient temperature range

0 °C to 40 °C (tested in accordance with IEC 60068-2-1 and IEC 60068-2-2)

Maximum altitude

2,000 m (800 mbar) (at 25 °C ambient temperature)

Pollution Degree

2

Indoor use only.

Operating Environment

Operating temperature rangeUsed with a Single-Module ATCA Chassis0 °C to 25 °CUsed with a 14-Slot ATCA Chassisdependent on final system installation

Relative humidity range

10% to 90%, noncondensing (tested in accordance with IEC 60068-2-56)


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