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16863A 分析仪|是德科技 (在产)

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LA1 系列逻辑分析仪,102 通道
高性能数字信号分析与调试
产品简介
16863A 是 102 通道便携式逻辑分析仪,深存储捕获最高 128 Mb/256 Mb(半通道/全通道),为数字调试提供业界最快速度。
核心参数
• 最大定时速率:5 GHz 常规 / 12.5 GHz 时序缩放
• 最大存储深度:128 Mpts
• 信号类型:单端、差分
• 通道数:102
• 标准:LPDDR4, LPDDR3, LPDDR2, LPDDR, DDR4, DDR3, DDR2, DDR
功能特性
• 逻辑分析仪配置
102 通道,350 MHz 状态,12.5 GHz 定时缩放,2.5 GHz 定时,标配 2 Mb 深度
15 英寸(38.1 cm)彩色触摸屏显示屏,用于查看并快速浏览大量信号和总线
内置可拆卸 SSD 驱动器、USB 3.0 端口和 LAN,用于快速传输和存储大量数据
1.4 GHz 触发序列器,确保捕获高速事件
• 定时分析(异步采样)
高达 2.5 GHz/5.0 GHz(全通道/半通道)定时,用于以高分辨率捕获信号活动
高达 128 Mb/256 Mb(全通道/半通道)深存储,用于识别在时间上相距很远的问题根本原因和症状
12.5 GHz(80 ps)定时缩放,256K 存储深度,用于以高分辨率分析触发事件
• 状态分析(同步采样)
状态数据速率高达 1.4 Gb/s,状态时钟速率高达 700 MHz,用于高速数据捕获
自动阈值/采样位置设置,用于在高速总线上进行精确测量
所有通道同时显示眼图,用于快速识别问题信号
• 配置注意事项(探头和附加软件单独订购)
可从多种单端和差分通用及专用探头中选择
添加应用软件,以洞察、调试、分析和优化系统运行
立即购买您当前所需的速度和存储深度能力,并随需求变化进行升级
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是德科技 | KEYSIGHT
16863A 分析仪 详细指标
High-performance digital signal analysis and debugging
一、Characteristics
State (synchronous) sampling mode 16861A 16862A 16863A
16864A
Channels
34
(32 data and
2 clock)
(64 data and
4 clock)
(96 data and
6 clock)
(128 data and
8 clock)
Sampling 选件: Single 时钟
Clock (clock is on Pod 1) 1 1 1
1
Clock qualifiers 1 3 4
4
Reset qualifier 0 0 0
1
Sampling option: Multiple clocks
条件:1. Clock channels can be used as data channels
these state sampling clock modes depends on the state sampling option that you select.
• Primary - All pods sampled by the primary clock definition.
Clocks or clock qualifiers 2 4 4
4
Reset qualifier 0 0 0
0
The state sampling clock mode specifies how the clock inputs are used for sampling. The availability of
o In single clock mode, only the clock signal on Pod
1 can be used.
o In multiple clocks, either a single clock signal can be used, or a combination of clocks can be
条件:Write in DDR/LPDDR captures and for Rising and Falling edge in general-purpose data captures.
• Dual sample - In the dual sample clock mode, you can capture two samples per clock edge with two
different threshold offsets and separate sampling positions. These separate threshold offsets and
sampling positions allow you to set independent thresholds and sampling positions for Read and
• Primary/secondary – Primary pod is sampled on Primary clock and secondary pod is sampled on
secondary clock, but the captured data of both secondary and primary clocks is saved together when
the primary clock occurs
• Demux - Data being probed by one pod is demultiplexed into the logic analyzer memory that is
normally used for two pods. The demultiplex mode uses the primary and secondary clocks to
State (synchronous) sampling mode
Sample rate 350 MHz (Base configuration)
700 MHz
(Option
700)
350 MHz
条件:hours within the operating temperature range of 5 to 40 °C, unless otherwise stated, and after a 45 -minute warm -up period. The
Maximum state data rate (spec)
1
Captures data up to 350
Mbps on either edge of a clock up to 350 MHz
Captures data up to 700
Mbps on either edge of the clock up to 700 MHz
Captures data up to 700
Mbps on any combination of multiple clocks up to 350 MHz
Captures data up to 700
Mbps on both edges of a clock up to 350 MHz
Captures data up to 1400
Mbps on both edges of the clock up to 700 MHz
Maximum state clock frequency 350 MHz 700 MHz
350 MHz
Minimum state clock frequency 12.5 MHz (single edge)
6.25 MHz (both edges)
12.5 MHz (single edge),
6.25 MHz (both edges)
0 MHz
Minimum time between active clock edges 1430 ps 715 ps
1430 ps
Maximum trigger sequencer speed 700 MHz 1400 MHz 700 MHz
1. Specification (spec): Represents warranted performance of a calibrated instrument that has been stored for a minimum of 2
二、State mode functional Specifications
Single clock Multiple clocks
Minimum setup time 80 ps
250 ps
Minimum hold time 80 ps
250 ps
Minimum data valid window 160 ps
500 ps
Sample position adjustment range 7 ns typical
12 ns typical
Sample position adjustment resolution 20 ps typical
80 ps typical
Minimum state clock pulse width Single edge: 200 ps Single edge
250 ps
Clock qualifier setup time 200 ps
250 ps
Clock qualifier hold time 200 ps
250 ps
RESET clock qualifier setup time
2 ns N/A
RESET clock qualifier hold time
0 ps N/A
Minimum secondar to primary clock time N/A
350 ps
Minimum primary to secondary clock time N/A
150 ps
Minimum secondary to secondary clock time N/A
1.43 ns
Time tag resolution 80 ps
80 ps
Maximum time count between stored states 66 days
66 days
Maximum trigger sequence steps
16
Trigger sequence step branching Arbitrary 4-way if/then/else Arbitrary
4-way if/then/else
Start, center, end or user-defined
Trigger resources •
16 patterns evaluated as =
!=, >, >=, <, <=
• 8 double-bounded ranges
evaluated as · 范围, not · 范围
• 4 edge detectors in timing,
3 in transitional timing
• 1 occurrence counter per
sequence level
• 1 timer
• 4 flags
• 1 arm in
• Burst patterns
• Event counters - 2
• 16 patterns evaluated as =, !=,
>, >=, <, <=
• 8 double-bounded ranges
evaluated as · 范围, not · 范围
• 4 edge detectors in timing
3 in
transitional timing
• 1 occurrence counter per
sequence level
• 3 timers
• 4 flags
• 1 arm in
• Global counters - 2
Maximum occurrence counter 999,999,999
999,999,999
Maximum range width 64 bits
64 bits
Maximum pattern width 128 bits single label
128 bits single label
Timer range
200 sample clock period to 27
hours
100 ns to 27 hours
Timer resolution 5 ns
5 ns
Timer accuracy ± (8 sample clock period +
2
ns +
0.01%)
± (8 sample clock period +
2 ns +
0.01%)
Timer reset latency 80 sample clock period
80 sample clock period
特性 Full 通道 Half 通道
Quarter channel (Optional on
16862A or 16864A
requires Options
-700 and –T10
Max sample rate 2.5 GHz 5.0 GHz
10 GHz
Sample period 400 ps to 10 ns 200 ps
100 ps
Memory depth Up to 128 M Up to 256 M Up to 512 M
Timing zoom (captured simultaneously with timing or state sampling mode capture)
Timing analysis sample rate
12.5 GHz (80 ps sample resolution)
Timing interval accuracy
• Within a
16 channel block
• Between
16 channel blocks
± (80 ps + 130 ps +
0.01% of time interval reading)
± (80 ps + 400 ps +
0.01% of time interval reading)
Memory depth
256 K samples
Trigger position Start, center, end or user-defined
Minimum data pulse width 1 sample period +
200 ps
三、Timing mode functional Specifications
Minimum data pulse width 1 sample period +
200 ps
Timing interval accuracy
• Within a
16 channel pod
• Across
16 channel pods
± (1 sample period + 130 ps + 0.01% of time interval reading)
1
± (1 sample period + 400 ps + 0.01% of time interval reading)
1
Maximum trigger sequencer speed
2.5 GHz
Maximum trigger sequence steps
8
Trigger sequence step branching Arbitrary
4-way if/then/else
Trigger position Start, center, end or user-defined
条件:Trigger resource conditions Arbitrary Boolean combinations
Trigger resources
16 patterns evaluated as =, !=, &gt;, &gt;=, &lt;, &lt;=
8 double-bounded ranges evaluated as in range, not in range
4 edge detectors in timing
3 in transitional timing
1 occurrence counter per sequence level
1 timer
4 flags
1 arm in
Burst trigger
2 event counters
Pulse clear
条件:1. With single -ended flying lead and Soft Touch Pro probes.
Maximum occurrence counter
999,999,999
Maximum range width
64 bits
Maximum pattern width
128 bits single label
Timer range
200 sample clock period to 27 hours
Timer resolution
5 ns
Timer accuracy ± (8 sample clock period + 2 ns +
0.01%)
Timer reset latency
80 sample clock period
16860 Series instrument characteristics
16860 Series instrument characteristics
Standard data views
Waveform Integrated display of data as digital waveforms, analog waveforms imported
from an external oscilloscope, and/or as a chart of a bus’ values over time
Listing Displays data as a state listing
Compare Compares data from different acquisitions and highlights differences
Source code Displays time-correlated source code and inverse assembly simultaneously in a
split display
Define the trigger event by simply clicking on a line of source code
Obtain source-code-level views of dynamically loaded software or code moved
from ROM to RAM during a boot-up sequence using address offsets
Requires access to source files via the LAN or instrument hard drive to provide
源 code 相关
Source correlation does not require any modification or recompilation of your
source code
Eye scan Displays eye diagrams across all buses and signals simultaneously, allowing
Data display
Numeric bases for data display Binary, hex, octal, decimal, signed decimal (two’s complement), ASCII, symbols
Symbolic support/object file format compatibility
Number of symbols/ranges Unlimited (limited only by amount of virtual memory available on
16860 Series
logic 分析仪)
Object file formats supported IEEE-695, Aout, Omf86, Omf96, Omf386, Sysrof, ELF/DWARF1
1
ELF/DWARF2
1, ELF/Stabs1, ELF/
Stabs2, ELF/Mdebug Stabs, TICOFF/COFF, TICOFF/Stabs
ASCII GPA (general purpose ASCII)
User-defined symbols Specify a mnemonic for a given bit pattern for a label or bus
Available data/file formats ala Contains information to reconstruct the display appearance, instrument settings and trace data (optional) that were present when the file was created
xml Extensible markup language for configuration portability and programmability
csv CSV (comma-separated values) format for transferring data to other
applications like Microsoft Excel alb Export logic analyzer data for post-processing. Alb data (module binary format) can be parsed using programming tools
Standard analysis tools
Filter/colorize Show, hide or color certain samples in a trace for easier identification and
条件:1. Supports C++ name de -mangling.
Find (next/previous) Locate specific data/events in a captured trace
16860 Series instrument characteristics
16860A Series PC characteristics
Operating system Microsoft Windows
10 embedded (64-bit)
Processor
3 GHz Intel i5 quad core processor
Chipset Intel Q77
System memory
8 GB
Removable SSD
256 GB
Installed on SSD Operating system, latest revision of the logic and protocol application software,
optional application software ordered with the logic analyzer
16860A Series instrument controls
LCD touch-screen display Large
38.1-cm (15-in.) touch-screen display makes is easy to view a large
编号波形或 states
Front-panel hot keys Dedicated hot keys for selecting run mode and disabling touch screen
Front-panel knob General-purpose knob adjusts viewing and measurement parameters
Keyboard and mouse USB keyboard and USB mouse
16860A Series video display modes
Touch-screen display standard Size
38.1-cm (15-in.)
Resolution: 1024 x
768
External display Simultaneous display capability; Front panel and external
You can write programs to control the logic analyzer application from remote computers on the local area
network using COM. The COM automation server is part of the logic analyzer application. This software
allows you to write programs to control the logic analyzer. All measurement functionality is controllable via
the COM interface
The remote programming interface works through the COM automation objects, methods and properties
provided for controlling the logic analyzer application. 16860A Series interfaces
16860A Series interfaces
Peripheral interfaces
Display One
15-pin XGA connector and one DisplayPort connector
Audio ports Line in, line out, mic in
USB ports Two 3.0 ports on rear, two 2.0 ports on front, two
2.0 ports on rear
Connectivity interfaces
LAN 10Base-T, 100Base-T
1000Base-T
Connector RJ-45
接口(含) 外部 instrumentation
Trigger or arm external devices or receive signals that can be used to arm measurement hardware within the logic
输入 Rising 边沿或 falling 边沿
Action taken When received, the logic analyzer takes the actions described in the trigger
sequence step
Input signal level
±6 V max
Threshold level Selectable: ECL, LVPECL, LVTTL, PECL, TTL User defined (±5 V in 50 mV
Minimum signal amplitude
200 mV
Trigger out
Trigger Select one event from the following as the trigger out event: logic analyzer trigger,
flag 1, flag 2, flag 3 or flag
4
Polarity Active high
Output signal VOH (output high level)
2.0 V min
VOL (output low level)
0.5 V max
Signal load
50 Ω (For good signal quality, the trigger out signal should be terminated in 50 Ω to
外部 reference 时钟
Clock 10 MHz
±0.01%
Signal swing Minimum 200 mVp-p swing, Maximum
5 Vp-p swing
Connector BNC 16860A Series physical characteristics
16860A Series physical characteristics
Dimensions 16861A, 16862A, 16863A
16864A
Height
291.57 mm (11.48 in)
Width
450.65 mm (17.74 i
以上指标摘自厂家官方数据手册,完整定义、测试条件与保证值口径以手册为准。完整指标、测试条件与定义口径请见产品页「软件和手册 | 白皮书」栏目中的官方数据手册。
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邮箱:shichang@chrent.com

官网:www.chrent.com


• 益莱储(北京)检测设备租赁有限公司(北京市)

来广营高科技产业园区4号楼3层301朝阳区

邮编:100102

电话:400-819-2800

邮箱:jim.chen@electrorent.com

官网:www.electrorent.com/cn


• 北京东方中科集成科技股份有限公司科技租赁事业部(北京市)

北京市海淀区阜成路67号银都大厦12层

邮编:100142

电话:400-650-5566

传真:010-68728001

邮箱:wangml@oimec.com.cn

官网:www.dfzk.com/rent


• 客而禧设备租赁(上海)有限公司(Shanghai)

徐汇区古美路1515号19号楼903室

邮编:201102

电话:021-54453166

邮箱:krc@krcchina.com

官网:www.krcchina.com


• 深圳市瑞普高电子有限公司(深圳市)

天安云谷产业园一期3栋D座1505-1506龙岗区

邮编:518129

电话:0755-29050100

邮箱:rickluo@ruipugao.com

官网:www.ruipugao.com


• 苏州锦凡精密仪器科技有限公司(苏州)

苏州市高新区滨河路625号创业大厦5幢505

邮编:215011

电话:18914031336

邮箱:18914031336@jfsz.net


解决方案合作伙伴


• Tokyo Weld Co., Ltd.(Ota-ku)

2-28-1 Kitamagome

邮编:143-0021

电话:81-3-3775-4331

传真:81-3-3775-4359

邮箱:d-imai@tokyoweld.com

官网:www.tokyoweld.com


• 上海恒榉电子科技有限公司(Shanghai)

上海市奉贤区南桥镇西闸公路1036号3栋2层

邮编:201401

电话:18112779808

邮箱:salesvalue@everise-hj.com

官网:everise-hj.com


• 佳燁科技股份有限公司(Ghiatek)(桃園市龜山區)

光明街243巷2號

邮编:33372

电话:+886-3-350-9960

传真:+886-3-320-3475

邮箱:support@ghiatek.com

官网:www.ghiatek.com.tw


• 华美博科技(北京)有限公司(北京市)

蓝靛厂东路2号金源时代商务中心C座9A2海淀区

邮编:100097

电话:010-88598732

邮箱:sino@sino-microtech.com

官网:www.sino-microtech.com


• 和创联合科技(北京)有限公司(北京市)

中关村东路18号财智国际大厦A座1612海淀区

邮编:100083

电话:400 650 7802

邮箱:info@hisuntest.com

官网:www.hisuntest.com


• 昆山捷得立电子有限公司(昆山市)

登云路288号海创大厦C座25楼

邮编:215316

电话:0512-36831748

邮箱:sales@jiedeli-china.com

官网:www.jiedeli-china.com


• 深圳市捷泰普科技有限公司(深圳市)

宝安区西乡街道前进二路桃源居南面深圳市智汇创新中心A座216室

邮编:518126

电话:0755-83908488

邮箱:sales@jtptech.cn

官网:www.jtptech.cn


• 深圳市易捷测试技术有限公司(深圳市)

福虹路9号世贸广场C座1203室福田区

邮编:518033

电话:0755-83698930

邮箱:dongni.zhang@gbit.net.cn

官网:gbit.net.cn


• 深圳市泰仕捷科技有限公司(深圳市)

松岗大道7号汉海达大厦616室宝安区

邮编:518105

电话:0755-27128586

邮箱:riky.gua@tesijet.com

官网:www.tesijet.com


• 深圳市蓉声科技有限公司(深圳市)

福中路海连大厦连天阁 1103 室福田区

邮编:518033

电话:13828880571

邮箱:jiang.qian@radiation-test.com

官网:www.radiation-test.com


• 苏州伊欧陆系统集成有限公司(苏州)

星湖街218号生物纳米园A7楼305室苏州工业园区

邮编:215000

电话:4008808776

邮箱:info@eoulu.com

官网:www.eoulu.com


• EM Labs Inc.(Kobe)

1-4-13 Mizukasadori, Nagata

邮编:653-0842

电话:+81-50-5370-0262

邮箱:info@emlabs.jp

官网:www.emlabs.jp


• MPI Corporation(Chupei)

No. 155 Chungho Street

邮编:302

电话:+886-3-555-1771

传真:+886-3-551-8381

邮箱:info@mpi-corporation.com

官网:www.mpi-corporation.com/ast


• NOFFZ(Tönisvorst)

Vorster Strasse 238

邮编:47918

电话:+49 2151-99878-0

邮箱:info@noffz.com

官网:www.noffz.com


• Power Technology Solutions(Santa Clara)

3048 Scott Blvd

邮编:95054

电话:650-308-8091 ext:

传真:408-727-0827

邮箱:inquiries@pwrts.com

官网:www.pwrts.com


• Resillion(Hasselt)

Kempische Steenweg 303

邮编:3500

电话:+32 498 92 01 71

邮箱:global-ci-sales@resillion.com

官网:www.resillion.com


• Suzhou Link Ways Tech Co., Ltd.(Suzhou)

16F, Block B, Jin Shi Wang Hu Building, No. 18, Jia Rui alley, SIP

邮编:215021

电话:+86 512 6602 8998


• 上海凌测电子科技有限公司(上海)

峨山路91弄120号陆家嘴软件园8号楼401A室浦东新区

邮编:200127

电话:021-61090608

邮箱:yue.lin@merlintest.com.cn

官网:www.merlintest.com.cn


• 上海北汇信息科技有限公司(上海市)

秀路100号虹桥总部1号4号楼3C闵行区紫

邮编:201103

电话:021-34716271

邮箱:info@polelink.com

官网:polelink.com


• 上海怿星电子科技有限公司(上海市)

钦州北路1199号智汇园87号楼5F室徐汇区

邮编:200233

电话:021-64955659

邮箱:biz@e-planet.cn

官网:www.e-planet.cn


• 东昇电磁兼容技术(深圳)有限公司(深圳市)

福田中心区26-3路中国凤凰大厦2栋25G

邮编:518026

电话:0755-82792411

邮箱:sales@jstoyo.cn

官网:www.jstoyo.cn


• 南京派格测控科技有限公司(南京市)

建邺区建邺人才服务大厦16楼

邮编:210019

电话:4008920858

邮箱:sales@pgtec.cn

官网:pgtec.cn


• 南京纳特通信电子有限公司(南京市)

江宁开发区临淮街20号

邮编:210012

电话:025-84471796

邮箱:sales@rflight.cn

官网:www.rflight.cn


• 深圳市研辰科技有限公司(深圳市)

益田路3008号皇都广场C座2815室福田区

邮编:518048

电话:0755-82828703

邮箱:roger_huang@ascentest.com

官网:www.ascentest.com


原厂翻新与二手仪器


• 是德科技原厂二手仪器商城(Keysight Certified Pre-Owned):www.keysight.com/used/cn/zh/


• 原厂翻新仪器经与新品相同的最终测试与校准,原厂保修最长 5 年;享 40%–90% 折扣,另有线上 5% / 教育 15% 优惠


 

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